What is D Flip-Flop?
| In the last discussion, we talk about the RS flip-flop. For this tutorial, we will do D Flip-Flop configuration. D Flip-Flop operates in the same manner of a regular RS flip-flop with an addition of an inverter. It consists of the basic RS flip-flop circuit with an added NOT gate on the input terminal. The addition of a NOT gate ensures that the input will never be equal in any instance. A D flip-flop is develop to eliminate the undesirable condition of the indeterminate state in the RS Flip-flop. The D flip-flop has only two input as compared to three input in the RS flip-flop. The inputs of the D flip-flop are D and CP, which represents the regular input value and the clock respectively. It is constructed with a regular RS Flip-flop; and, a NOT gate on one of the inputs of the connected NAND gate |
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Intended Learning Outcome (What Will I Learn?)
After reading and participating in this tutorial, the readers should be able to:
- learn how to implement an D FLIP-FLOP logic circuit;
- create a digital logic circuit for DFLIP-FLOP simulation ; and,
- simulate the created D FLIP-FLOP simulation digital logic circuit.
Requirements
To be able to follow this tutorial, you should have the following tools at hand:
- A desktop PC or laptop with Windows (7, 8, 10) operating system; and,
- A BOOLR latest release version which you can download at its Github repository GGBRW/BOOLR or vist its website at boolr.me
Difficulty
- Intermediate
Part 1: Setting up a new project the BOOLR app.
1 | Open BOOLR.exe from the downloaded latest release zip file of the app.
2 | Create a new project by clicking NEW BOARD.
Then, you will be directed to Create New Board where you are ask to type in the name of the new board.
Type in the board name. For this tutorial, lets have "D Flip-Flop " as board name.
3 | Click 
to finalize setting up a new project.
| For the basic operations and functions of the BOOLR Digital Logic Simulation, you are advise to read the Introduction to BOOLR. |
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Part 2: Creating a D Flip-Flop Digital Logic Circuit in BOOLR
Now, we create a circuit in the BOOLR for D Flip-Flop.
1 | We start by selecting components needed in the simulation. Basically, we will need to setup four NAND gates. Hence, the BOOLR simulator doen't have a pre-configured NAND gate, you need to create the four sets of NAND gateSelect AND gate by clicking 
. Add the four sets of AND gate in the worksheet, simply click at where you want the to add the component. Make sure that is properly space from each other.
2 | Add NOT gate by clicking 
. Place a NOT gates after the each AND gates excluding the right most one. Make sure not to place it directly besides the AND gate hence it may not be connected at all, and might not have an ample room for the connecting wire.
4 | Select input devices from 
. From the menu click on INPUT.
6 | Add an input before the pair of upper-left AND gate.
7 | Add an input clock in below the added inputs. Enable this component by clicking on 
. From the drop-down option, select Clock.
8 | Once you've added the clock, a time delay editor appears. Set the time delay to your preference. For this tutorial, I will set the time delay to 1000 ms. The clock will set the time response of enabling the two other inputs.
9 | Add two output after the NOT gate at the right most AND gates. To add the component, you need first to enable and click at the location where you want it to add.
8 | Connect AND and NOT gate to configure a NAND gate.
9 | Add a NOT gate to one terminal of NAND(b) this will inverse the value of input D.
10 | The addition of this NOT gate ensures that R and S values in an RS Flip-Flop should not be equal at any instance. This is done by having one input D connected to NAND(a) and NOT gates.
11 | Connect clock pulse CP to NAND(a) and NAND(b) gates. As what I have discussed in my last tutorial, the clock is the enabling factor for the input D. Connecting CP, in such manner, enables the input values for both NAND(a) and NAND(b).
12 | NAND(a) and NAND(b) ouput is feed to NAND(c) and NAND(d) respectively.
13 | Connect the output to the NAND(c) and NAND(d).
14 | Connect the output terminal for NAND(c) to the input of NAND(d). This is to set a dependency of the operation of the NAND gates through a latch to each ouputs.
15 | Connect the output terminal for NAND(d) to the input of NAND(c).
Part 3: Simulation of the created D Flip-FLop
| How does D FLIP-FLOP works? |
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| In a D Flip-Flop, the D input goes directly to the S ( NAND(a) ) input and a complementary value goes to the R ( NAND(b) ) input. For example, D has a value equal to 0. So, NAND(a) will have an input equal to 0 and NAND(b) equal to 1. As long as the input D is 0, the NAND(a) and NAND(b) output are at the high (1) level. THus, the circuit cannot change state aside from the value of input D. The input is sampled when CP becomes 1, the Q ( NAND(c) ) output goes 1. IF D is 1, the Q ( NAND(c) ) output goes to 1, making the circuit at set state. If D is 0, output Q ( NAND(c) ) goes to 0 and the circuit returns to clear state. |
1 |Verify the simulation button if it is play or paused. Pause button indicates simulation is going on, while Play button signifies the simulation is paused.By default, the BOOLR app is always on simulation.
2 | Verifying our discussion earlier, input the values. Observe the result at the OUTPUT. To change the values of input, click on the number inside the input symbol.
Result of Simulation:
Watch the video clip below for the actual simulation.
Curriculum
You can browse the other curriculum for BOOBLR Digital Logic Simulator.
- Introduction to BOOLR Digital Logic Simulation
- Half Adder
- Full Adder
- Half Subtractor
- Full Subtractor
- Exclusive-OR implemented with AND-NOT-OR gates
- Exclusive-NOR implemented with AND-NOT gates
- Flip-Flop
- RS Flip-Flop
Posted on Utopian.io - Rewarding Open Source Contributors
@juecoree, Approve is not my ability, but I can upvote you.
Hi, I am sorry to reject your contribution but you did not plan the tutorial well. Some of the topics/circuits could be put together. You often describe steps that a user would know when they learned using the interface and functions in the program.
Additionally, you repeat the part 1 in every post, include unnecessary images of states that are not that important for the tutorial. That makes your posts look longer but the actual information is more or less only in a half of the post or less.
It could be also said that the essential tutorial could be written in the first post of the series because that one could show how to use the program for digital logic but you repeat the information how to add each component and join them into circuit. Talking about each circuit has its own value but it is not really exclusive to the software you used.
You can contact us on Discord.
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